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MC10EP16VA, MC100EP16VA 3.3V / 5V ECL Differential Receiver/Driver with High Gain
The EP16VA is a world-class differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain output. QHG and QHG outputs have a DC gain several times larger than the DC gain of an EP16. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. Under open input conditions (pulled to VEE) internal input clamps will force the QHG output LOW. Special considerations are required for differential inputs under No Signal conditions to prevent instability. The 100 Series contains temperature compensation.
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8 1 SO-8 D SUFFIX CASE 751 8 HEP64 ALYW 1 1 8 KEP64 ALYW
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 HP64 ALYW 1
8 KP64 ALYW 1
* * * * * *
270 ps Typical Propagation Delay Gain > 200 20 mV Minimum Input Voltage Swing Maximum Frequency > 3 GHz Typical PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V Open Input Default State
H = MC10 K = MC100 A = Assembly Location
L = Wafer Lot Y = Year W = Work Week
*For additional information, see Application Note AND8002/D
* * VBB Output
ORDERING INFORMATION
Device MC10EP16VAD MC10EP16VADR2 MC100EP16VAD MC100EP16VADR2 MC10EP16VADT MC10EP16VADTR2 MC100EP16VADT Package SO-8 SO-8 SO-8 SO-8 TSSOP-8 Shipping 98 Units/Rail 2500 Tape & Reel 98 Units/Rail 2500 Tape & Reel 100 Units/Rail
TSSOP-8 2500 Tape & Reel TSSOP-8 100 Units/Rail
MC100EP16VADTR2 TSSOP-8 2500 Tape & Reel
(c) Semiconductor Components Industries, LLC, 2002
1
September, 2002 - Rev. 4
Publication Order Number: MC10EP16VA/D
MC10EP16VA, MC100EP16VA
NC
1
8
VCC
PIN DESCRIPTION
PIN D 2 7 QHG D*, D* QHG, QHG VBB D 3 6 QHG VCC VEE NC VBB 4 5 VEE FUNCTION ECL Data Inputs ECL High Gain Data Outputs Reference Voltage Output Positive Supply Negative Supply No Connect
* Pins will default LOW when left open.
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 75 kW N/A > 4 kV > 200 V > 2 kV Level 1 UL-94 V-0 @ 0.125 in 167
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
MAXIMUM RATINGS (Note 2)
Symbol VCC VEE VI Iout IBB TA Tstg JA JC JA JC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage C ode u o age NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 LFPM 500 LFPM std bd 0 LFPM 500 LFPM std bd <2 to 3 sec @ 248C 8 SOIC 8 SOIC 8 SOIC 8 TSSOP 8 TSSOP 8 TSSOP Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI VCC VI VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 Units V V V V mA mA mA C C C/W C/W C/W C/W C/W C/W C
2. Maximum Ratings are those values beyond which device damage may occur.
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MC10EP16VA, MC100EP16VA
10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 3)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 4) Output LOW Voltage (Note 4) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 5) Input HIGH Current Input LOW Current 0.5 Min 20 2165 1365 2090 1365 1750 2.0 1850 Typ 28 2240 1490 Max 31 2415 1615 2415 1690 1950 3.3 150 0.5 Min 22 2230 1430 2155 1460 1825 2.0 1925 25C Typ 30 2355 1555 Max 38 2480 1680 2480 1755 2025 3.3 150 0.5 Min 24 2290 1490 2215 1490 1850 2.0 1950 85C Typ 32 2415 1615 Max 40 2540 1740 2540 1815 2050 3.3 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 4. All loading with 50 W to VCC-2.0 volts. 5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 6)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 7) Output LOW Voltage (Note 7) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 8) Input HIGH Current Input LOW Current 0.5 Min 20 3865 3065 3790 3065 3450 2.0 3550 Typ 28 3940 3190 Max 31 4115 3315 4115 3390 3650 5.0 150 0.5 Min 22 3930 3130 3855 3130 3525 2.0 3625 25C Typ 30 4055 3255 Max 38 4180 3380 4180 3455 3725 5.0 150 0.5 Min 24 3990 3190 3915 3190 3550 2.0 3650 85C Typ 32 4115 3315 Max 40 4240 3440 4240 3515 3750 5.0 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 6. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 7. All loading with 50 W to VCC-2.0 volts. 8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 9)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 10) Output LOW Voltage (Note 10) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 11) Input HIGH Current Input LOW Current 0.5 Min 20 -1135 -1935 -1210 -1935 -1550 -1450 VEE+2.0 Typ 28 -1060 -1810 Max 31 -885 -1685 -885 -1610 -1350 0.0 150 0.5 Min 22 -1070 -1870 -1145 -1870 -1475 -1375 VEE+2.0 25C Typ 30 -945 -1745 Max 38 -820 -1620 -820 -1545 -1275 0.0 150 0.5 Min 24 -1010 -1810 -1085 -1810 -1450 -1350 VEE+2.0 85C Typ 32 -885 -1685 Max 40 -760 -1560 -760 -1485 -1250 0.0 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 9. Input and output parameters vary 1:1 with VCC. 10. All loading with 50 W to VCC-2.0 volts. 11. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP16VA, MC100EP16VA
100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 12)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 13) Output LOW Voltage (Note 13) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 14) Input HIGH Current Input LOW Current 0.5 Min 20 2155 1355 2075 1355 1550 2.0 1850 Typ 28 2280 1480 Max 36 2405 1605 2420 1675 1950 3.3 150 0.5 Min 22 2155 1355 2075 1355 1725 2.0 1825 25C Typ 30 2280 1480 Max 38 2405 1605 2420 1675 1925 3.3 150 0.5 Min 24 2155 1355 2075 1355 1700 2.0 1800 85C Typ 32 2280 1480 Max 40 2405 1605 2420 1675 1900 3.3 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 12. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 13. All loading with 50 W to VCC-2.0 volts. 14. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 15)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 16) Output LOW Voltage (Note 16) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 17) Input HIGH Current Input LOW Current 0.5 Min 20 3855 3055 3775 3055 3450 2.0 3550 Typ 28 3980 3180 Max 36 4105 3305 4120 3375 3650 5.0 150 0.5 Min 22 3855 3055 3775 3055 3425 2.0 3525 25C Typ 30 3980 3180 Max 38 4105 3305 4120 3375 3625 5.0 150 0.5 Min 24 3855 3055 3775 3055 3400 2.0 3500 85C Typ 32 3980 3180 Max 40 4105 3305 4120 3375 3600 5.0 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 15. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 16. All loading with 50 W to VCC-2.0 volts. 17. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 18)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 19) Output LOW Voltage (Note 19) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential) (Note 20) Input HIGH Current Input LOW Current 0.5 Min 20 -1145 -1945 -1225 -1945 -1550 -1450 VEE+2.0 Typ 28 -1020 -1820 Max 36 -895 -1695 -880 -1625 -1350 0.0 150 0.5 Min 22 -1145 -1945 -1225 -1945 -1575 -1475 VEE+2.0 25C Typ 30 -1020 -1820 Max 38 -895 -1695 -880 -1625 -1375 0.0 150 0.5 Min 24 -1145 -1945 -1225 -1945 -1600 -1500 VEE+2.0 85C Typ 32 -1020 -1820 Max 40 -895 -1695 -880 -1625 -1400 0.0 150 Unit mA mV mV mV mV mV V A A
NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 18. Input and output parameters vary 1:1 with VCC. 19. All loading with 50 W to VCC-2.0 volts. 20. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP16VA, MC100EP16VA
AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER VPP tr tf Characteristic Maximum Frequency (See Figure 2 Fmax/JITTER) Propagation Delay to Output Differential Duty Cycle Skew (Note 22) Cycle-to-Cycle Jitter (See Figure 2 Fmax/JITTER) Input Voltage Swing (Differential) (See Figure 3) Output Rise/Fall Times (20% - 80%) Q, Q 20 70 200 Min Typ >3 260 5.0 0.2 800 110 320 20 <1 1200 170 20 80 220 Max Min 25C Typ >3 270 5.0 0.2 800 110 340 20 <1 1200 180 20 80 250 Max Min 85C Typ >3 320 5.0 0.2 800 120 390 20 <1 1200 200 Max Unit GHz ps ps ps mV ps
21. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC-2.0 V. 22. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 900 800 VOUTpp (mV) 700 600 500 400 9 8 7 6 5 4 3 2 1 JITTEROUT ps (RMS)
200 100 0
(JITTER)
0
1000
2000
3000
4000
5000
FREQUENCY (MHz)
Figure 2. Fmax/Jitter
800 700 600 VOUTpp (mV) 500 400 300 200 100 0 20 15 10 VINpp (mV) 5 0
Figure 3. Gain vs. Input Voltage (50 MHz) http://onsemi.com
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EE EE
EEEEEEEEEEEEEE EEEEEEEEEEEEEE EEEEEEEEEEEEEE EEEEEEEEEEEEEE EEEEEEEEEEEEEE
300
MC10EP16VA, MC100EP16VA
Q Driver Device Q 50 W 50 W
D Receiver Device D
V TT V TT = V CC - 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020 - Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1404 AN1405 AN1406 AN1504 AN1568 AN1650 AN1672 AND8001 AND8002 AND8009 AND8020
- - - - - - - - - - -
ECLinPS Circuit Performance at Non-Standard VIH Levels ECL Clock Distribution Techniques Designing with PECL (ECL at +5.0 V) Metastability and the ECLinPS Family Interfacing Between LVDS and ECL Using Wire-OR Ties in ECLinPS Designs The ECL Translator Guide Odd Number Counters Design Marking and Date Codes ECLinPS Plus Spice I/O Model Kit Termination of ECL Logic Devices
For an updated list of Application Notes, please see our website at http://onsemi.com.
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MC10EP16VA, MC100EP16VA
PACKAGE DIMENSIONS
-X- A
8 5
SO-8 D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE AA
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDAARD IS 751-07 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
DIM A B C D F G K L M
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MC10EP16VA, MC100EP16VA
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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MC10EP16VA/D

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